HCLTech
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Engineering & R&D

Senior Developer - Test/Interface/UC Board Bring up

Santa Clara, United States

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Job Summary

HMTS Tool Automation for PCB placement - Python Backend / Placement

Algorithm Engineer

This engineer develops the core placement and routing engine logic in Python. They

consume structured board state data (JSON) and produce placement

recommendations, routing geometry, and pattern library queries. This is an algorithms-

heavy role requiring solid spatial reasoning and constraint optimization skills.

Key Responsibilities

1. Maintain And Enhance Existing Features By Troubleshooting Bugs And Resolving Ad-Hoc Requests Using Test/Interface Methodologies To Ensure Compliance With Project Specifications.
2. Provide Client Support By Presenting Data And Information Related To Test/Interface Performance, Resolving Tickets, And Assisting In Day-To-Day Support Activities Such As Monitoring Client Requirements And Tracking Project Schedules For Timely Delivery.
3. Create And Update Documentation In Line With Cmmi Standards, Focusing On Enhancement Activities And Client Requirements To Ensure Comprehensive Project Traceability.
4. Provide Technical Guidance And Mentorship To Junior Developers By Sharing Best Practices In Test/Interface And Uc Board Bringup Strategies To Enhance Team Capabilities And Project Outcomes.
5. Collaborate With Customers And Internal Teams To Gather And Analyze Requirements For Test/Interface Solutions, Ensuring Alignment With Development Objectives And Client Expectations.

Skill Requirements

Required Skills:

• Python 3.11+, clean object-oriented design, strong data modeling

• 2D computational geometry: coordinate transforms, rotation math, Euclidean distance, bounding box overlap detection

• Constraint-driven placement: optimizing component position and orientation subject to distance limits, overlap avoidance, and orientation preferences

• JSON data pipeline development: ingestion, normalization, structured storage, and query

• PostgreSQL or similar relational database

• Linux environment, Git

Other Requirements

Strongly Preferred:

• Background in EDA tool development, robotics path planning, or any domain involving spatial constraint satisfaction

• Experience with combinatorial optimization: greedy heuristics, branch-and-bound, or ILP solvers (e.g., CPLEX, OR-Tools)

• Familiarity with PCB design concepts at a high level (component placement,

routing layers, via types) — deep expertise not required but accelerates ramp-up

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